clk: renesas: rcar-gen3: Loop to find best rate in cpg_sd_clock_round_rate()

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cpg_sd_clock_round_rate() really needs the best rate, not the best
divider.  Hence change the iteration to find the former, and get rid of
the final division.

Add an out-of-range rate check while at it.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20190830134515.11925-6-geert+renesas@glider.be

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Geert Uytterhoeven 2019-08-30 15:45:12 +02:00

parent f1195d4ec7

commit 8a6d97a46d

1 changed files with 8 additions and 4 deletions

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drivers/clk/renesas/rcar-gen3-cpg.c

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