mips: econet: add multi-vpe capability to EN751221

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EN751221 is a 34Kc so it has two VPEs (threads) but MIPS_SMP_MT
requires VEIC to be enabled in the interrupt controller, which only
became supported in
commit 2ee2a685ee ("irqchip/econet-en751221: Support MIPS 34Kc VEIC mode")

Register SMP_MT on startup and override init_secondary with CPU
interrupt unmasking as required by the EN751221 VEIC intc hardware.

Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

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Caleb James DeLisle 2026-07-28 18:49:58 +00:00 • committed by Thomas Bogendoerfer

parent 5475c03fa2

commit 8ae6e79ee0

2 changed files with 42 additions and 4 deletions

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4

arch/mips/econet/Kconfig

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42

arch/mips/econet/init.c

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