net: macb: Added ZynqMP-specific initialization

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The GEM controllers on ZynqMP were missing some initialization steps which
are required in some cases when using SGMII mode, which uses the PS-GTR
transceivers managed by the phy-zynqmp driver.

The GEM core appears to need a hardware-level reset in order to work
properly in SGMII mode in cases where the GT reference clock was not
present at initial power-on. This can be done using a reset mapped to
the zynqmp-reset driver in the device tree.

Also, when in SGMII mode, the GEM driver needs to ensure the PHY is
initialized and powered on.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

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This commit is contained in:

Robert Hancock 2022-01-27 10:37:35 -06:00 • committed by David S. Miller

parent f4ea385a16

commit 8b73fa3ae0

2 changed files with 64 additions and 3 deletions

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4

drivers/net/ethernet/cadence/macb.h

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63

drivers/net/ethernet/cadence/macb_main.c

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