drm/i915/guc: Fix confused register capture list creation

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The GuC has a completely separate engine class enum when referring to
register capture lists, which combines render and compute. The driver
was using the 'normal' GuC specific engine class enum instead. That
meant that it thought it was defining a capture list for compute
engines, the list was actually being applied to the GSC engine. And if
a platform didn't have a render engine, then it would get no compute
register captures at all.

Fix that.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230512013544.3367606-1-John.C.Harrison@Intel.com

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This commit is contained in:

John Harrison 2023-05-11 18:35:44 -07:00

parent db2ce1ab05

commit 8ba3ba992f

3 changed files with 72 additions and 34 deletions

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36

drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c

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61

drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c

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9

drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h

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