x86: L3 cache index disable for 2.6.26

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New versions of AMD processors have support to disable parts
of their L3 caches if too many MCEs are generated by the
L3 cache.

This patch provides a /sysfs interface under the cache
hierarchy to display which caches indices are disabled
(if any) and to monitoring applications to disable a
cache index.

This patch does not set an automatic policy to disable
the L3 cache.  Policy decisions would need to be made
by a RAS handler.  This patch merely makes it easier to
see what indices are currently disabled.

Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

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Mark Langsdorf 2008-07-18 16:03:52 -05:00 • committed by Ingo Molnar

parent 026e2c05ef

commit 8cb22bcb1f

1 changed files with 81 additions and 6 deletions

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arch/x86/kernel/cpu/intel_cacheinfo.c

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