spi: spi_amd: Updates to set tx/rx count functions

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AMD SPI TX and RX counter registers are 1-byte length registers. The
existing value will be overwritten during register write, so masking is not
required.

Co-developed-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Signed-off-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Co-developed-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Link: https://patch.msgid.link/20240925133644.2922359-5-Raju.Rangoju@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>

...

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Raju Rangoju 2024-09-25 19:06:40 +05:30 • committed by Mark Brown

parent efd9834b86

commit 8cd9141ad4

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drivers/spi/spi-amd.c

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