cxl/hdm: Use stored Component Register mappings to map HDM decoder capability

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Now, that the Component Register mappings are stored, use them to
enable and map the HDM decoder capabilities. The Component Registers
do not need to be probed again for this, remove probing code.

The HDM capability applies to Endpoints, USPs and VH Host Bridges. The
Endpoint's component register mappings are located in the cxlds and
else in the port's structure. Duplicate the cxlds->reg_map in
port->reg_map for endpoint ports.

Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Signed-off-by: Robert Richter <rrichter@amd.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
[rework to drop cxl_port_get_comp_map()]
Link: https://lore.kernel.org/r/20231018171713.1883517-8-rrichter@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

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This commit is contained in:

Robert Richter 2023-10-18 19:17:00 +02:00 • committed by Dan Williams

parent 2dd1827920

commit 8ce520fdea

3 changed files with 43 additions and 39 deletions

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48

drivers/cxl/core/hdm.c

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33

drivers/cxl/core/port.c

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5

drivers/cxl/mem.c

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