ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 register offsets

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The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded.
This makes it difficult to reuse the code for SoCs like AM437x that have
a single instance of IRQENABLE_MPU and IRQSTATUS_MPU registers.
Hence handling the case using offset of 4 to accommodate single set of IRQ*
registers generically.

Signed-off-by: Keerthy <j-keerthy@ti.com>
[paul@pwsan.com: fixed whitespace alignment problems reported by checkpatch.pl]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

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Keerthy 2015-07-08 11:12:26 +05:30 • committed by Paul Walmsley

parent 6e487001c5

commit 8d4be7d8bf

1 changed files with 20 additions and 18 deletions

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arch/arm/mach-omap2/prm44xx.c

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