arm64: dts: renesas: r9a08g046: Add wdt device node

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The RZ/G3L SOC has 3 watchdog timer channels:
  - channel0 (wdt0) for Cortex-A55-CPU Non-Secure,
  - channel1 (wdt1) for Cortex-A55 CPU Secure,
  - channel2 (wdt2) for Cortex-M33 CPU.

Add wdt0 node to RZ/G3L ("R9A08G046") SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260505125921.149682-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Biju Das 2026-05-05 13:59:16 +01:00 • committed by Geert Uytterhoeven

parent 89b67a16a5

commit 8e46bc6370

1 changed files with 14 additions and 0 deletions

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arch/arm64/boot/dts/renesas/r9a08g046.dtsi

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