ASoC: arizona: Optimise FLL loop gains

For optimal performance the FLL loop gain should be adjusted depending on
the frequency of the input clock for the loop.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Mark Brown 2013-03-05 12:08:57 +08:00
commit 8f113d7d26