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RISC-V Devicetrees for v6.20
Sophgo: For CV18xx serials: Update RX/TX FIFO size to fix the USB transfer issue. For SG2042: Optimize the DTS file format, including moving PLIC/CLINT nodes into cpu dtsi and sorting peripheral nodes by address. In addition, we also enable RTC for Pioneerbox. For SG2044: Add "b" ISA extension to fix dtbs_check warnings. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTYPcWJ6By3aFu8IuKHG95Quc97dgUCaXAfgQAKCRCHG95Quc97 do8uAQDip0m8C75LTXTmDqas5jc3DjbRu9ud5Ty7+I1vjsr/NAD/bEMV7+pWNdlo JhwKc+MSxLGAehxEzFTEHNPGs9xRVAA= =Vexy -----END PGP SIGNATURE----- Merge tag 'riscv-sophgo-dt-for-v6.20' of https://github.com/sophgo/linux into soc/dt RISC-V/Sophgo Devicetrees for v6.20 Sophgo: For CV18xx serials: Update RX/TX FIFO size to fix the USB transfer issue. For SG2042: Optimize the DTS file format, including moving PLIC/CLINT nodes into cpu dtsi and sorting peripheral nodes by address. In addition, we also enable RTC for Pioneerbox. For SG2044: Add "b" ISA extension to fix dtbs_check warnings. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> * tag 'riscv-sophgo-dt-for-v6.20' of https://github.com/sophgo/linux: riscv: dts: sophgo: sg2044: Add "b" ISA extension riscv: dts: sophgo: fix the node order of SG2042 peripheral riscv: dts: sophgo: Move PLIC and CLINT node into CPU dtsi riscv: dts: sophgo: enable hardware clock (RTC) on the Milk-V Pioneer riscv: dts: sophgo: cv180x: fix USB dwc2 FIFO sizes Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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