clk: renesas: r8a7796: Add Sound SSI clock

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This patch adds SSI(all) and SSI{0,1,2,3,4,5,6,7,8,9} clocks for R8A7796
SoC.

Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Kazuya Mizuguchi 2017-04-20 02:46:34 +09:00 • committed by Geert Uytterhoeven

parent 7cb1ce2688

commit 8fe3574280

1 changed files with 11 additions and 0 deletions

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drivers/clk/renesas/r8a7796-cpg-mssr.c

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