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drm/amdgpu/gfx6: Adjust how harvested TCCs are set up
Adjust gfx_v6_0_setup_tcc() to keep it working after a GFX IP block soft reset. On a soft reset, the TCP_CHAN_STEER_LO/HI registers are not cleared so the function needs a slight adjustment to how the number of active TCCs are calculated. Additionally, let's expose the disabled TCC mask in the tcc_disabled_mask field, like on other GPUs. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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