OMAP3: PM: Clear the SCTLR C bit in asm code to prevent data cache allocation

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On the newer ARM processors like CortexA8, CortexA9, the caches can be
speculatively loaded while they are getting flushed.

Clear the SCTLR C bit to prevent further data cache allocation as
part of cache clean routine

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>

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Santosh Shilimkar 2011-01-23 22:51:09 +05:30 • committed by Kevin Hilman

parent 46f557cb45

commit 9062511097

1 changed files with 27 additions and 0 deletions

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arch/arm/mach-omap2/sleep34xx.S

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