RISC-V soc-drivers for v6.19

Microchip:
 Add bindings and mfd drivers for two syscon regions on PolarFire SoC,
 needed as part of a rework of the devicetree to permit supporting,
 among other things, pinctrl sanely and avoiding the "new" pic64gx SoC
 ever using the original incorrect clock nodes. Fiddle with the Microchip
 RISC-V MAINTAINERS entry to add these drivers and avoid branding it FPGA
 only.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCaSh2VwAKCRB4tDGHoIJi
 0v1wAQDkO6LPWFsER9jbuSlGCWMvfPalt4ANm2drGchLjivx9AD7BK2X9hMDjZbb
 9Aw7UIvVmz6blpnMuvH+waFc0l8V1wQ=
 =TqpS
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkoyc8ACgkQmmx57+YA
 GNns8w//VuJyVQzyCEh/MC+eCMeQXFEYFkHYAFgrE3YAbeQYS1fZgF0O4U+dvtlh
 5yZb9uDIo8a+xlGzTEJg2CxzC/o2aGHCmxOElNnjTkXqPWbO3Y/kPT65342DUDWX
 JTz82DzbIZ+1Hiq+/bjW2I4iNvLPRemXxdzDl1DMBWV6HMkdSteJKlmDlwNhdbLQ
 5W51QskiijY+Wg+a5/tZ0mUHTEF02CVK5yiqawsH7hjkSLZhUNUUUah+ygjehDmQ
 XKBM2bf/oXkBFl3Z7z4WCmDkqIPZ2DAWG3kjr4xGNb5cPEiXUf9tv6qjEtJe9FVQ
 cyvcQ1UzN55yOUp5kR0n3xaJY+WRqA7kHllKKStWnC/mB9Q74fQZ8Mm1JPL6dcj1
 YaKC06TJgaUQ4hwnZyD4rNguKoc/JWDTjNfC5nMaUyvmBr7Fnwfn96Uhe6yNUVkT
 FGDgau1YdIIqaahSV3Mc7TC7+x4MFE2Ndyg1F775mlj8++05L3tW852Wrtc/Faa0
 5w4VsC/17sLEm71cO4S0S+xuPdrBas8O6GrFfDX1rcZ2EUsGbjcaV+Wgz/vHQcuA
 H36aC4f9cWP73GnoDBufd0Ue31lioqtUGgD6n7zqXKXwMiLGGQYEZpZdEMM+zdGd
 hZjRvq1T4WoWd7RCcqvHsZVqBzcV23VKNQ+6SFVdY/bZL9h2H4c=
 =JOnG
 -----END PGP SIGNATURE-----

Merge tag 'soc-drivers-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers-late

RISC-V soc-drivers for v6.19

Microchip:
Add bindings and mfd drivers for two syscon regions on PolarFire SoC,
needed as part of a rework of the devicetree to permit supporting,
among other things, pinctrl sanely and avoiding the "new" pic64gx SoC
ever using the original incorrect clock nodes. Fiddle with the Microchip
RISC-V MAINTAINERS entry to add these drivers and avoid branding it FPGA
only.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'soc-drivers-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  MAINTAINERS: rename Microchip RISC-V entry
  MAINTAINERS: add new soc drivers to Microchip RISC-V entry
  soc: microchip: add mfd drivers for two syscon regions on PolarFire SoC
  dt-bindings: soc: microchip: document the simple-mfd syscon on PolarFire SoC

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-11-27 22:59:40 +01:00
commit 909752d392
6 changed files with 145 additions and 1 deletions