drm/amd/display: Prepare for new interfaces

Browse source

[WHY]:
Lut pipeline will be hooked up differently in some asics
need to add new interfaces and missing registers.

[HOW]:
Add missing registers and hook up programming from DPP for pre-blend
lut.

Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Martin Leung <Martin.Leung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Martin Leung 2022-05-13 17:40:42 -04:00 • committed by Alex Deucher

parent 85f4bc0c33

commit 90f33674a0

8 changed files with 564 additions and 28 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

106

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h

View file

91

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c

View file

7

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h

View file

5

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c

View file

236

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c

View file

117

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.h

View file

14

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c

View file

16

drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c

View file