drm: rcar-du: Cache DSYSR value to ensure known initial value

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DSYSR is a DU channel register that also contains group fields. It is
thus written to by both the group and CRTC code, using read-update-write
sequences. As the register isn't initialized explicitly at startup time,
this can lead to invalid or otherwise unexpected values being written to
some of the fields if they have been modified by the firmware or just
not reset properly.

To fix this we can write a fully known value to the DSYSR register when
turning a channel's functional clock on. However, the mix of group and
channel fields complicate this. A simpler solution is to cache the
register and initialize the cached value to the desired hardware
defaults.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

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This commit is contained in:

Laurent Pinchart 2018-08-22 16:05:02 +03:00

parent 1f98b2a4fd

commit 9144adc5e5

3 changed files with 17 additions and 11 deletions

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16

drivers/gpu/drm/rcar-du/rcar_du_crtc.c

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5

drivers/gpu/drm/rcar-du/rcar_du_crtc.h

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7

drivers/gpu/drm/rcar-du/rcar_du_group.c

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