RDMA/mlx5: Support deferred rate limit configuration

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Allow passing a rate limit attribute in modify QP flows even when the
QP is in a state that does not support packet pacing programming in
the lower layers.

When the user sets a rate limit during a QP transition that is not to
RTS, store the value in the mlx5 QP struct and program it to FW when
the QP later transitions to RTS, which is the state that allows
configuring the rate limit index in the QP context.

Signed-off-by: Maher Sanalla <msanalla@nvidia.com>
Reviewed-by: Michael Guralnik <michaelgur@nvidia.com>
Signed-off-by: Edward Srouji <edwards@nvidia.com>
Link: https://patch.msgid.link/20260524-packet-pacing-v1-4-3d79439f8d08@nvidia.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>

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Maher Sanalla 2026-05-24 18:38:05 +03:00 • committed by Leon Romanovsky

parent 29e0a014dd

commit 915bbc8578

2 changed files with 14 additions and 1 deletions

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1

drivers/infiniband/hw/mlx5/mlx5_ib.h

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14

drivers/infiniband/hw/mlx5/qp.c

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