MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.

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CN38XX pass 1 required icache prefetching to be turned off. This chip never
reached production and is long dead. Other processor specific icache settings
are done by the bootloader. Remove these bits from the kernel.

Signed-off-by: Chad Reese <kreese@caviumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/8944/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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Chad Reese 2015-01-15 16:11:16 +03:00 • committed by Ralf Baechle

parent 726da2f82a

commit 920cda3870

1 changed files with 0 additions and 20 deletions

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arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h

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