drm/nouveau/disp/sor/gf119: both links use the same training register

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commit a8953c52b9 upstream.

It appears that, for whatever reason, both link A and B use the same
register to control the training pattern.  It's a little odd, as the
GPUs before this (Tesla/Fermi1) have per-link registers, as do newer
GPUs (Maxwell).

Fixes the third DP output on NVS 510 (GK107).

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Ben Skeggs 2016-06-03 14:37:40 +10:00 • committed by Greg Kroah-Hartman

parent 7233bb86c3

commit 921daff213

1 changed files with 1 additions and 2 deletions

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drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c

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