r8169: enable PLL power-down for chip versions 34, 35, 36, 42

There's no known reason why PLL powerdown on D3 shouldn't be enabled
on chip versions 34, 35, 36, and 42. At least the vendor driver doesn't
exclude any of these chip versions.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Heiner Kallweit 2021-01-10 20:48:40 +01:00 • committed by Jakub Kicinski
commit 9224d97183