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ASoC: Intel: Bxtn: Add Broxton DSP support

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Broxton DSP is mostly similar to Skylake one but with subtle
differences like no Code Load DMA and uses HDA DMA for code
loading, DSP D0 and D3 sequences are different.

These changes are comprehended by adding different DSP power up
and down handlers, and new loader ops and also adding prepare and
trigger which HDA DSP DMA requires

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Jayachandran B <jayachandran.b@intel.com>
Signed-off-by: GuruprasadX Pawse <guruprasadx.pawse@intel.com>
Signed-off-by: Kranthi G <gudishax.kranthikumar@intel.com>
Signed-off-by: Dharageswari R <dharageswari.r@intel.com>
Signed-off-by: Ramesh Babu <ramesh.babu@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jeeja KP 2016-03-11 10:12:56 +05:30 • committed by Mark Brown
commit 92eb4f62cb
5 changed files with 463 additions and 1 deletions
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