clk: sunxi: Add support for PLL6 on the A31

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The A31 has a slightly different PLL6 clock. Add support for this new clock in
our driver.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Emilio López <emilio@elopez.com.ar>

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Maxime Ripard 2014-02-05 14:05:03 +01:00 • committed by Emilio López

parent 5abdbf2f49

commit 92ef67c53a

2 changed files with 46 additions and 0 deletions

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1

Documentation/devicetree/bindings/clock/sunxi.txt

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45

drivers/clk/sunxi/clk-sunxi.c

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