RDMA/iw_cxgb4: set the correct FID value in DSGL commands

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The FID value in a ULP_MEMIO command needs to be set to an IQ ID of
a queue configured for our PF.  The FID/IQ id is used to index into the
PCIE FID table, to find out on which function the DMA needs to be
issued. Essentially, every DMA needs to have the ingress queue. The exact
ingress queue doesn't matter, but it needs to be an ingress queue
associated with the function you want to see the DMA on.

Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>

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Hariprasad S 2016-05-06 22:17:56 +05:30 • committed by Doug Ledford

parent ccd2c30b45

commit 92f850ec3a

2 changed files with 7 additions and 2 deletions

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5

drivers/infiniband/hw/cxgb4/mem.c

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4

drivers/net/ethernet/chelsio/cxgb4/t4_msg.h

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