drm/i915: Try to program PKG_C_LATENCY more correctly

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The current PKG_C_LATENCY stuff looks busted in several ways:
- doesn't account for multiple pipes from different commits
  correctly
- WM_LINETIME is in units of 0.125usec, PKG_C_LATENCY wants
  units on 1 usec
- weird VRR state stuff being checked
- use of pointless RMW

Fix it all up. Note that it's still a bit unclear how all this
works, especially how the added_wake_time ties into the flipq
triggers in DMC, and how we need to sequence updates to
PKG_C_LATENCY when enabling/disabling pipes/etc. We may also
need to think what to about the WM1+ disabling and the related
PSR chicken bits when we can use PKG_C_LATENCY for early wake...

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250624170049.27284-3-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

...

This commit is contained in:

Ville Syrjälä 2025-06-24 20:00:42 +03:00

parent 4e3f3add49

commit 9367e41483

3 changed files with 61 additions and 43 deletions

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1

drivers/gpu/drm/i915/display/intel_display.c

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6

drivers/gpu/drm/i915/display/intel_display_core.h

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97

drivers/gpu/drm/i915/display/skl_watermark.c

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