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net/mlx5e: Use CQE padding for Ethernet CQs

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Writing 64B CQEs to 128B cache lines results in a RMW operation. Padding
the CQEs to 128B if possible improves performance on 128B cache line
systems like PPC.

Testing on PPC showed up to a 24% improvement in small packet throughput
vs the default behavior, depending on the workload and system topology.

Signed-off-by: Daniel Jurgens <danielj@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
This commit is contained in:
Daniel Jurgens 2018-11-05 16:05:37 -06:00 • committed by Saeed Mahameed
commit 939de57d30
4 changed files with 15 additions and 7 deletions
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