drm/i915/rkl: Add power well support

RKL power wells are similar to TGL power wells, but have some important
differences:

 * PG1 now has pipe A's VDSC (rather than sticking it in PG2)
 * PG2 no longer exists
 * DDI-C (aka TC-1) moves from PG1 -> PG3
 * PG5 no longer exists due to the lack of a fourth pipe

Also note that what we refer to as 'DDI-C' and 'DDI-D' need to actually
be programmed as TC-1 and TC-2 even though this platform doesn't have TC
outputs.

Bspec: 49234
Cc: Imre Deak <imre.deak@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200504225227.464666-9-matthew.d.roper@intel.com
This commit is contained in:
Matt Roper 2020-05-04 15:52:13 -07:00 • committed by Lucas De Marchi
commit 93e2323b5c
2 changed files with 186 additions and 3 deletions