ASoC: rsnd: Add RZ/G3E SoC probing and register map

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RZ/G3E audio subsystem has a different register layout compared to
R-Car Gen2/Gen3/Gen4, as described below:

- Different base address organization (SCU, ADG, SSIU, SSI as
  separate regions accessed by name)
- Additional registers: AUDIO_CLK_SEL3, SSI_MODE3, SSI_CONTROL2
- Different register offsets within each region

Add RZ/G3E SoC's audio subsystem register layouts and probe support.

Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://patch.msgid.link/20260525110230.4014435-6-john.madieu.xa@bp.renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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John Madieu 2026-05-25 11:02:17 +00:00 • committed by Mark Brown

parent 22622faf81

commit 948b075ebc

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sound/soc/renesas/rcar/core.c

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180

sound/soc/renesas/rcar/gen.c

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26

sound/soc/renesas/rcar/rsnd.h

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