perf/x86/intel/uncore: Add Sapphire Rapids server CHA support

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CHA merges the caching agent and Home Agent (HA) responsibilities of the
chip into a single block. It's one of the Sapphire Rapids server uncore
units.

The layout of the control registers for a CHA uncore unit is a little
bit different from the generic one. The CHA uncore unit also supports a
filter register for TID. So a specific format and ops are required.
Expose the common MSR ops which can be reused.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lore.kernel.org/r/1625087320-194204-3-git-send-email-kan.liang@linux.intel.com

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Kan Liang 2021-06-30 14:08:26 -07:00 • committed by Peter Zijlstra

parent c54c53d992

commit 949b11381f

3 changed files with 96 additions and 4 deletions

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6

arch/x86/events/intel/uncore_discovery.c

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4

arch/x86/events/intel/uncore_discovery.h

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90

arch/x86/events/intel/uncore_snbep.c

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