From 94aad340fbf22a8a2484879c1e862c856d0e946f Mon Sep 17 00:00:00 2001 From: Xu Yang Date: Tue, 30 Jun 2026 18:36:28 +0800 Subject: [PATCH] arm64: dts: imx95: switch usb3 controller to flattened model Switch to use flattened model for USB3 controller. To enable USB controller with restricted DMA access range to work correctly, add a simple-bus to constrain the dma address. Note: This changes the USB controller compatible string from "fsl,imx95-dwc3" to "nxp,imx95-dwc3". This requires a kernel with CONFIG_USB_DWC3_IMX enabled; otherwise, the new DTB will not be compatible with older one. As i.MX95 is a new SoC and is still under development, it's acceptable at development early phase. Signed-off-by: Xu Yang Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx95.dtsi | 62 ++++++++++++------------ 1 file changed, 31 insertions(+), 31 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi index d6c549c16047..305751046d66 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -1867,37 +1867,6 @@ }; }; - usb3: usb@4c010010 { - compatible = "fsl,imx95-dwc3", "fsl,imx8mp-dwc3"; - reg = <0x0 0x4c010010 0x0 0x04>, - <0x0 0x4c1f0000 0x0 0x20>; - clocks = <&scmi_clk IMX95_CLK_HSIO>, - <&scmi_clk IMX95_CLK_32K>; - clock-names = "hsio", "suspend"; - interrupts = ; - #address-cells = <2>; - #size-cells = <2>; - ranges; - power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; - dma-ranges = <0x0 0x0 0x0 0x0 0x10 0x0>; - status = "disabled"; - - usb3_dwc3: usb@4c100000 { - compatible = "snps,dwc3"; - reg = <0x0 0x4c100000 0x0 0x10000>; - clocks = <&scmi_clk IMX95_CLK_HSIO>, - <&scmi_clk IMX95_CLK_24M>, - <&scmi_clk IMX95_CLK_32K>; - clock-names = "bus_early", "ref", "suspend"; - interrupts = ; - phys = <&usb3_phy>, <&usb3_phy>; - phy-names = "usb2-phy", "usb3-phy"; - snps,gfladj-refclk-lpm-sel-quirk; - snps,parkmode-disable-ss-quirk; - iommus = <&smmu 0xe>; - }; - }; - hsio_blk_ctl: syscon@4c0100c0 { compatible = "nxp,imx95-hsio-blk-ctl", "syscon"; reg = <0x0 0x4c0100c0 0x0 0x1>; @@ -1906,6 +1875,37 @@ power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; }; + bus@4c100000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + dma-ranges = <0x0 0x0 0x0 0x0 0x10 0x0>; + ranges; + + usb3: usb3_dwc3: usb@4c100000 { + compatible = "nxp,imx95-dwc3", "nxp,imx8mp-dwc3"; + reg = <0x0 0x4c100000 0x0 0x10000>, + <0x0 0x4c010010 0x0 0x04>, + <0x0 0x4c1f0000 0x0 0x20>; + reg-names = "core", "blkctl", "glue"; + clocks = <&scmi_clk IMX95_CLK_HSIO>, + <&scmi_clk IMX95_CLK_HSIO>, + <&scmi_clk IMX95_CLK_24M>, + <&scmi_clk IMX95_CLK_32K>; + clock-names = "hsio", "bus_early", "ref", "suspend"; + interrupts = , + ; + interrupt-names = "dwc_usb3", "wakeup"; + power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; + phys = <&usb3_phy>, <&usb3_phy>; + phy-names = "usb2-phy", "usb3-phy"; + snps,gfladj-refclk-lpm-sel-quirk; + snps,parkmode-disable-ss-quirk; + iommus = <&smmu 0xe>; + status = "disabled"; + }; + }; + usb3_phy: phy@4c1f0040 { compatible = "fsl,imx95-usb-phy", "fsl,imx8mp-usb-phy"; reg = <0x0 0x4c1f0040 0x0 0x40>,