drm/i915/display: Mask RO bits in gen9_write_dc_state()

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The DC_STATE_EN register has read-only status bits that are set by
hardware on some platforms. These bits may cause the read-back
verification loop in gen9_write_dc_state() to spuriously retry.

Mask the RO bits from the read-back comparison to prevent
unnecessary retries.

Changes in v2:
- Rename patch from
  "drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC
bits"
  to
  "drm/i915/display: Mask RO bits in gen9_write_dc_state()"
- Mask only RO bits rather than masking all non DC state bits
  in DC_STATE_EN.  As the register has also some clear-on-write flags,
  like 'Display DC*CO State Status DSI'(Imre Deak)

Changes in v3:
- Limit ro mask to read-back comparison.

Changes in v4:
- Add bit definitions (Jani Nikula)

BSpec: 49437,69115
Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patch.msgid.link/20260605155359.4116572-1-dibin.moolakadan.subrahmanian@intel.com

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Dibin Moolakadan Subrahmanian 2026-06-05 21:23:59 +05:30 • committed by Animesh Manna

parent fe12dfaef7

commit 94c0b93dc2

2 changed files with 24 additions and 4 deletions

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24

drivers/gpu/drm/i915/display/intel_display_power_well.c

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4

drivers/gpu/drm/i915/display/intel_display_regs.h

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