ARM: tegra: apalis-tk1: get rid of fake clocks simple bus

Get rid of the fake clocks simple bus and use node names as per the
actual schematics.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Marcel Ziswiler 2018-09-01 15:05:02 +02:00 • committed by Thierry Reding
commit 94c3847dc5
2 changed files with 8 additions and 22 deletions