mlxsw: reg: Extend PMLP tx/rx lane value size to 4 bits

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The tx/rx lane fields got extended to 4 bits, update the reg field
description accordingly.

Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Reviewed-by: Shalom Toledo <shalomt@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

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Jiri Pirko 2019-10-31 11:42:06 +02:00 • committed by David S. Miller

parent d74361dc58

commit 94e768373a

1 changed files with 3 additions and 2 deletions

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5

drivers/net/ethernet/mellanox/mlxsw/reg.h

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