drm/i915/gen9: add WaClearFlowControlGpgpuContextSave

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This allows writes to EU flow control registers. Together
with SIP code from the user-mode driver this resolves a
hang seen in some pre-emption scenarios. Note that this
patch is just the kernel mode part of this workaround.

v2. Oops, add FLOW_CONTROL_ENABLE macro to i915_reg.h.

Signed-off-by: Tim Gore <tim.gore@intel.com>
Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458144826-17269-1-git-send-email-tim.gore@intel.com

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Tim Gore 2016-03-16 16:13:46 +00:00 • committed by Tvrtko Ursulin

parent 26720ab97f

commit 950b2aaeea

2 changed files with 3 additions and 0 deletions

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1

drivers/gpu/drm/i915/i915_reg.h

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2

drivers/gpu/drm/i915/intel_ringbuffer.c

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