perf/x86: Move Nehalem PEBS code to flag

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Minor cleanup: use an explicit x86_pmu flag to handle the
missing Lock / TLB information on Nehalem, instead of always
checking the model number for each PEBS sample.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: acme@kernel.org
Cc: jolsa@kernel.org
Link: http://lkml.kernel.org/r/20170816222156.19953-2-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>

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Andi Kleen 2017-08-16 15:21:53 -07:00 • committed by Ingo Molnar

parent d9a50b0256

commit 9529835514

3 changed files with 4 additions and 5 deletions

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1

arch/x86/events/intel/core.c

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arch/x86/events/intel/ds.c

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arch/x86/events/perf_event.h

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