drm/i915/adlp: Implement workaround 16013190616

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New workaround added to specification, requiring bit 15 of
GEN8_CHICKEN_DCPR_1 to be programed before power well 1 is enabled.

BSpec: 54369
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211028230449.115832-1-jose.souza@intel.com

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José Roberto de Souza 2021-10-28 16:04:49 -07:00

parent c34c1c4cd6

commit 9556829ce4

2 changed files with 9 additions and 3 deletions

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5

drivers/gpu/drm/i915/display/intel_display_power.c

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7

drivers/gpu/drm/i915/i915_reg.h

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