clk: rockchip: add support for half divider

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The new Rockchip socs have optional half divider:
The formula is shown as:
	freq_out = 2*freq_in / (2*div + 3)
Is this the same for all of new SoCs.

So we use "branch_half_divider" + "COMPOSITE_NOMUX_HALFDIV \
DIV_HALF \ COMPOSITE_HALFDIV \ CMPOSITE_NOGATE_HALFDIV"
to hook that special divider clock-type into our clock-tree.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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Elaine Zhang 2018-06-15 10:16:50 +08:00 • committed by Heiko Stuebner

parent d409d59f02

commit 956060a527

4 changed files with 323 additions and 0 deletions

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1

drivers/clk/rockchip/Makefile

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227

drivers/clk/rockchip/clk-half-divider.c

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10

drivers/clk/rockchip/clk.c

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85

drivers/clk/rockchip/clk.h

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