drm/i915/icl: No need to ack intr through master control

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All other master control register bits, except the enable,
are read only and they are level indications of the second
level interrupt status. Only touch enable bit and rectify
the comment.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181015141440.21845-2-mika.kuoppala@linux.intel.com

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Mika Kuoppala 2018-10-15 17:14:39 +03:00

parent 4376b9c965

commit 95b0e7c14c

1 changed files with 2 additions and 2 deletions

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drivers/gpu/drm/i915/i915_irq.c

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