spi: fsl-dspi: Add ~50ns delay between cs and sck

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Add delay between chip select and clock signals, before clock starts and
after clock stops.

Signed-off-by: Aaron Brice <aaron.brice@datasoft.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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Aaron Brice 2015-04-03 13:39:31 -07:00 • committed by Mark Brown

parent c1c14957af

commit 95bf15f386

1 changed files with 60 additions and 4 deletions

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drivers/spi/spi-fsl-dspi.c

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