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i.MX clocks changes for 6.6
- Add the PDM IPC clock for i.MX93 - Add 519.75MHz frequency support for i.MX9 PLL - Simplify the .determine_rate() for GPR mux - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource - Add the audio mux clock to i.MX8 - Fix the SPLL2 MULT range for PLLv4 - Update the SPLL2 type in i.MX8ULP - Fix the SAI4 clock on i.MX8MP - Add silicon revision print for i.MX25 on clocks init - Drop the return value from __mx25_clocks_init - Fix the clock pauses on no-op set_rate for i.MX8M composite clock - Drop restrictions for PLL14xx and fix its max prediv value - Drop the 393216000 and 361267200 from PLL14xx rate table to allow glitch free switching -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEdRlgxHYCb3ovKt456LNSLBEEo7YFAmTcn0MACgkQ6LNSLBEE o7ZySQ//TTMsTMXwWkFQsV+4Q2x0wq6NyM+X2ajcRk+EVgT5Dv8SAYXtpP7ActWX AN5XX0zM/tXZQedzbV1ERm4EDGoff1CeAPa5G3Alms3q5gookHwun93ehf7sObeM JPWIyU/UzC4x7CgyL7gQaCpm/9RMlNiMg2QvbhabxMsH89qm2jUx11EeoQkexLKk 2kP+hBQ1/3CQxNJyHtbrbyl+nBWddASiK5zZTf6ualA+tbJAJES7s1/ZB+WX9/A5 QptiFnY5TobZsTiGA+OGRQBLjP0IR+edchOR523uFfwEnZkISi/7KXqPNqtjkzCc nEjopMAwven1NA2OAqP/HWYLncL5yF75KMtLgaA55glYFvts+wuYqwq21oD7IEMX FpynaXcOs+loTWHbp7PDgEEX0dENhnWcn48RAVrYQW9stBJpyeSL3ULF/+kJ+OeF FnBY3rtmzorDGCF3fznGDsDk9gQOwAmdYPlDIDgvQDlTvhJy2M2rS8VJe34J7YNU IgwkM0MFyxNPi5Fd+Yl/5TRmJHsc2wG4Ezci3lLVjlw0+eEnLncNtHjBtxTx9vEf q+kigNL/YZfm890oNSxGzQWzf83c4l9z0uFh76aTXAzClW1FbvcpuhyWxO+CcEHg Mv4BB3PXEye5llYReRlBQo3Wy7LbasS/OXX4FQ5wsWl9t3X8YMI= =RcQs -----END PGP SIGNATURE----- Merge tag 'clk-imx-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux into clk-imx Pull i.MX clk driver updates from Abel Vesa: - Add the PDM IPC clock for i.MX93 - Add 519.75MHz frequency support for i.MX9 PLL - Simplify the .determine_rate() for GPR mux - Make the i.MX8QXP LPCG clock use devm_platform_ioremap_resource - Add the audio mux clock to i.MX8 - Fix the SPLL2 MULT range for PLLv4 - Update the SPLL2 type in i.MX8ULP - Fix the SAI4 clock on i.MX8MP - Add silicon revision print for i.MX25 on clocks init - Drop the return value from __mx25_clocks_init - Fix the clock pauses on no-op set_rate for i.MX8M composite clock - Drop restrictions for PLL14xx and fix its max prediv value - Drop the 393216000 and 361267200 from PLL14xx rate table to allow glitch free switching * tag 'clk-imx-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux: clk: imx: pll14xx: dynamically configure PLL for 393216000/361267200Hz clk: imx: pll14xx: align pdiv with reference manual clk: imx: composite-8m: fix clock pauses when set_rate would be a no-op clk: imx25: make __mx25_clocks_init return void clk: imx25: print silicon revision during init dt-bindings: clocks: imx8mp: make sai4 a dummy clock clk: imx8mp: fix sai4 clock clk: imx: imx8ulp: update SPLL2 type clk: imx: pllv4: Fix SPLL2 MULT range clk: imx: imx8: add audio clock mux driver dt-bindings: clock: fsl,imx8-acm: Add audio clock mux support clk: imx: clk-imx8qxp-lpcg: Convert to devm_platform_ioremap_resource() clk: imx: clk-gpr-mux: Simplify .determine_rate() clk: imx: Add 519.75MHz frequency support for imx9 pll clk: imx93: Add PDM IPG clk dt-bindings: clock: imx93: Add PDM IPG clk
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