drm/amd/display: Fix bug use wrong pp interface

Browse source

Used wrong pp interface, the original interface is
exposed by dpm on SI and paritial CI.

Pointed out by Francis David <david.francis@amd.com>

v2: dal only need to set min_dcefclk and min_fclk to smu.
    so use display_clock_voltage_request interface,
    instand of update all display configuration.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Rex Zhu 2018-08-16 11:36:38 +08:00 • committed by Alex Deucher

parent a3d9103ebf

commit 9650205a32

1 changed files with 10 additions and 2 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

12

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

View file