ARM: dts: at91: sama7g5ek: use proper slew-rate settings for GMACs

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Datasheet chapter "EMAC Timings" specifies that while in 3.3V domain
GMAC's MDIO pins should be configured with slew-rate enabled, while the
data + signaling pins should be configured with slew-rate disabled when
GMAC works in RGMII or RMII modes. The pin controller for SAMA7G5 sets
the slew-rate as enabled for all pins. Adapt the device tree to comply
with these.

Fixes: 7540629e2f ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210915074836.6574-2-claudiu.beznea@microchip.com

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Claudiu Beznea 2021-09-15 10:48:35 +03:00 • committed by Nicolas Ferre

parent d8d667ee02

commit 968f6e9d51

1 changed files with 22 additions and 6 deletions

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arch/arm/boot/dts/at91-sama7g5ek.dts

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