clk: renesas: r9a08g045: Add clocks, resets and power domains support for SSI

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Add SSI clocks, resets and power domains support for the SSI blocks
available on the Renesas RZ/G3S SoC.

Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241113133540.2005850-2-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Claudiu Beznea 2024-11-13 15:35:16 +02:00 • committed by Geert Uytterhoeven

parent a6ca7e6240

commit 97088b3a8e

1 changed files with 20 additions and 0 deletions

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drivers/clk/renesas/r9a08g045-cpg.c

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