clk: renesas: Add r8a7796 CPG Core Clock Definitions

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Add all R-Car M3-W Clock Pulse Generator Core Clock Outputs, as listed
in Table 8.2b ("List of Clocks [R-Car M3-W]") of the R-Car Gen3
datasheet (rev. 0.51 + Errata for Rev051 Mar 31 2016).

Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, and SSPSRC) are
not included, as they are used as internal clock sources only, and never
referenced from DT.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Simon Horman <horms+renesas@verge.net.au>

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Geert Uytterhoeven 2016-05-02 14:36:32 +02:00

parent 1faf8692bd

commit 972610fb23

1 changed files with 69 additions and 0 deletions

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include/dt-bindings/clock/r8a7796-cpg-mssr.h

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