clk: samsung: exynos542x: Add EPLL rate table

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A specific clock rate table is added for EPLL so it is possible
to set frequency of the EPLL output clock as multiple of various
audio sampling rates.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

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Sylwester Nawrocki 2017-06-09 12:46:06 +02:00

parent 8a9cf26e30

commit 9842452acd

1 changed files with 17 additions and 2 deletions

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drivers/clk/samsung/clk-exynos5420.c

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