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clk: renesas: Updates for v7.3
- Add RTC and display clocks on RZ/T2H and RZ/N2H, - Add audio and display clocks and resets on RZ/G3E, - Add SDHI, GPU, and USB2.0 clocks and resets on RZ/G3L, - Update the maintainer for the VersaClock 7 driver, - Add CAN-FD clocks and resets for RZ/G3S. - Miscellaneous fixes and improvements. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCalijCgAKCRCKwlD9ZEnx cD2YAQCsAFz3d2r1UpHBCtvrWJd9RFlb4XNaC+yPKHTPpUVMtQD/eCW8T81CLwMN 8ZIxfYm0xIrY9U6aYLu+jXVWG9XnxQs= =7PgU -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmp78jIUHHN3Ym95ZEBj aHJvbWl1bS5vcmcACgkQrQKIl8bklSUiyhAArODaLyJ/WGf6HYKzdkL1dTZfXOa7 1GKUY8TPivI6omCmRd4GwD2MdhRwmpOiNC5AV/qrn0IEQ3Rb8EnRp7DnHHaqkhzO inJ4rZrB2GPqF/nzj10gWItvQDxhwsG2Ak1c34sKOyLoX6oRsiiPLq8Q0P9YfB5D 80/6T28qtObEIjKpWvN49jRudTKgPS5sgl99NSNppTdfiF40DOTNbWlxuoBvT7dQ 6LE259ZjWeqPRQghLQPPwJDj4Lss/wkc/Q2xm8rH8lBYhelXSMQMAcL20O1peBDs yar/15YzAb8dqxHaFCwOdsL7hzDlvRAGtUYudGSFdqx++ujGx4ikIU/FDqyBRL2B QPYRHV5guLGHaCHffL0/9JirZ2i++KL2sIbFkwWS0ia3n8Y0DNVvIhLABDXAgY7c +p5enrwYU2dLBAiqNoSst+wTfyx0AbyhumMEeVk4PZqF79tRKKcJgF17KBhimAMU hsfJ2LXoGE1Cx+4q0OH3kU5igy3id2LPp1k0c6VXYWnuIRAnU4xjnW9H2eKObon7 BCoxCPWHNV7LD4LZs2avATq0WLHuQl9t0TMpafJ8n0BaV5Z8RMrcxFsipyM+qg9l zGSVxZ2Ik37v8DNajRqD9aP6bX+crKnuel0faQ7z89GaP/PZx8+Roxe9yqAXjFQ9 iKNcpwodTeB7kcA= =KW+M -----END PGP SIGNATURE----- Merge tag 'renesas-clk-for-v7.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas Pull Renesas clk driver updates from Geert Uytterhoeven: - Add RTC and display clocks on RZ/T2H and RZ/N2H - Add audio and display clocks and resets on RZ/G3E - Add SDHI, GPU, and USB2.0 clocks and resets on RZ/G3L - Update the maintainer for the VersaClock 7 driver - Add CAN-FD clocks and resets for RZ/G3S * tag 'renesas-clk-for-v7.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: r9a08g045: Add clocks and resets for CAN-FD dt-bindings: clock: renesas,versaclock7: Update maintainer clk: renesas: r9a09g047: Add LVDS clocks and resets clk: renesas: r9a09g077: Add LCDC and PLL3 clock support for RZ/T2H display pipeline clk: renesas: rzv2h-cpg: Extract PLL calculation helpers into shared library clk: renesas: rzv2h-cpg: Use per-SoC PLL reference frequency for calculations clk: renesas: r9a08g046: Add USB2.0 clock and reset entries clk: renesas: r9a09g077: Add RTC clocks clk: renesas: cpg-mssr: Implement dedicated MSTP delay logic for RZ/T2H LCDC and RTC clk: renesas: r9a08g046: Add clock and reset entries for GE3D clk: renesas: r9a08g046: Add clock and reset entries for SDHI clk: renesas: r9a09g047: Add audio clock and reset support dt-bindings: clock: renesas: Add audio clock inputs for RZ/V2H family dt-bindings: clock: renesas,r9a09g077/87: Add PCLKRTC clock ID dt-bindings: clock: renesas,r9a09g077/87: Add LCDC_CLKD clock ID
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