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intel-pinctrl for v5.8-1

Browse source 
* Introduce GPIO driver for Jasper Lake
 * Fix long standing bug in Sunrisepoint-H PAD locking code
 * Enable pin configuration setting for GPIO chip for Baytrail
 * Work around race condition in Cherriview hardware when handle IRQ
 * Clean up Cherryview code to be closer to other drivers
 
 The following is an automated git shortlog grouped by driver:
 
 baytrail:
  -  Use platform_get_irq_optional() explicitly
  -  Enable pin configuration setting for GPIO chip
 
 cannonlake:
  -  Use generic flag for special GPIO base treatment
 
 cherryview:
  -  Add missing spinlock usage in chv_gpio_irq_handler
  -  Use GENMASK() consistently
  -  Re-use data structures from pinctrl-intel.h (part 2)
 
 icelake:
  -  Use generic flag for special GPIO base treatment
 
 intel:
  -  Move npins closer to pin_base in struct intel_community
  -  Update description in struct intel_community
  -  Add Intel Jasper Lake pin controller support
  -  Introduce new flag to force GPIO base to be 0
  -  Introduce common flags for GPIO mapping scheme
 
 lynxpoint:
  -  Use platform_get_irq_optional() explicitly
 
 sunrisepoint:
  -  Fix PAD lock register offset for SPT-H
 
 tigerlake:
  -  Use generic flag for special GPIO base treatment
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Merge tag 'intel-pinctrl-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel

intel-pinctrl for v5.8-1

* Introduce GPIO driver for Jasper Lake
* Fix long standing bug in Sunrisepoint-H PAD locking code
* Enable pin configuration setting for GPIO chip for Baytrail
* Work around race condition in Cherriview hardware when handle IRQ
* Clean up Cherryview code to be closer to other drivers

The following is an automated git shortlog grouped by driver:

baytrail:
 -  Use platform_get_irq_optional() explicitly
 -  Enable pin configuration setting for GPIO chip

cannonlake:
 -  Use generic flag for special GPIO base treatment

cherryview:
 -  Add missing spinlock usage in chv_gpio_irq_handler
 -  Use GENMASK() consistently
 -  Re-use data structures from pinctrl-intel.h (part 2)

icelake:
 -  Use generic flag for special GPIO base treatment

intel:
 -  Move npins closer to pin_base in struct intel_community
 -  Update description in struct intel_community
 -  Add Intel Jasper Lake pin controller support
 -  Introduce new flag to force GPIO base to be 0
 -  Introduce common flags for GPIO mapping scheme

lynxpoint:
 -  Use platform_get_irq_optional() explicitly

sunrisepoint:
 -  Fix PAD lock register offset for SPT-H

tigerlake:
 -  Use generic flag for special GPIO base treatment
This commit is contained in:
Linus Walleij 2020-05-15 15:06:00 +02:00
commit 98a09fb4cb
12 changed files with 573 additions and 266 deletions
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