drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization

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According to the spec when initializing the display in TGL we should not
set PORT_CL_DW12 for the Aux channel of the combo PHYs. We will re-use the
power well hooks from ICL so only set this register on gen < 12.

v2: Generalize check for gen 12 (suggested by José)
v3: Rebase after enum phy introduction

Cc: Imre Deak <imre.deak@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190713010940.17711-2-lucas.demarchi@intel.com

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Lucas De Marchi 2019-07-12 18:09:19 -07:00

parent 08f0e4a7ec

commit 98a5c2a358

1 changed files with 8 additions and 4 deletions

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drivers/gpu/drm/i915/display/intel_display_power.c

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