powerpc: Add new cache geometry aux vectors

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This adds AUX vectors for the L1I,D, L2 and L3 cache levels
providing for each cache level the size of the cache in bytes
and the geometry (line size and number of ways).

We chose to not use the existing alpha/sh definition which
packs all the information in a single entry per cache level as
it is too restricted to represent some of the geometries used
on POWER.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

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Benjamin Herrenschmidt 2017-02-03 17:20:07 +11:00 • committed by Michael Ellerman

parent 608b42140e

commit 98a5f361b8

4 changed files with 58 additions and 1 deletions

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1

arch/powerpc/include/asm/cache.h

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20

arch/powerpc/include/asm/elf.h

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33

arch/powerpc/include/uapi/asm/auxvec.h

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5

arch/powerpc/kernel/setup_64.c

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