clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs

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[ Upstream commit 7e77a39265 ]

The PCIe GDSCs can be shared with other masters and should use the APCS
collapse-vote register when updating the power state.

This is specifically also needed to be able to disable power domains
that have been enabled by boot firmware using the vote register.

Following other recent Qualcomm platforms, describe this register and
the corresponding mask for the PCIe (and _phy) GDSCs.

Fixes: 955f2ea3b9 ("clk: qcom: Add GCC driver for SM8550")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231218-topic-8550_fixes-v1-5-ce1272d77540@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

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Konrad Dybcio 2023-12-18 17:02:06 +01:00 • committed by Greg Kroah-Hartman

parent af73be8a06

commit 98fd99cc9f

1 changed files with 8 additions and 0 deletions

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drivers/clk/qcom/gcc-sm8550.c

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